Tape-Out

If you've talked with me lately, I've probably told you how stressed out I am about something called a "tape-out." The phrase refers to production of an integrated circuit. According to my adviser, 20 or 30 years ago, before the internet was around, circuit designers would send physical tapes to the chip manufacturers. Hence the term tape-out. Thus when an electrical engineer is creating an integrated circuit, (s)he uses the term tape-out to describe the process.

Today I thought I'd share a little bit of the designer process, so you can understand what I'm talking about when I say I've been staring at colored polygons all day. Circuits perform a lot of tasks, from the main processing in our computers, to capturing images in some of our cameras, or detecting events in the world around us.

To create circuits to do all these things, engineers start simple and build up. The basic unit in an integrated circuit is the transistor, which acts as a switch in digital logic. The switch is on or off depending on the electrical signals we send to the transistor. I've taken public domain pictures from Wikipedia that shows the behavior when the transistor is off (first picture) or on (second picture).




The basis for transistor construction is the placement of materials with different characteristics. The "n" and "p" labels above are on materials with different elements. Placing these materials at proper distances from one another is critical to proper operation of the switches.

When electrical engineers create circuits, we need ways to control where the materials go, and then we can control the behavior of the circuit. Thus when I talk about colored polygons, I am talking about visualizing the locations of different types of material that determine a circuit's operation. I've labeled the drawings above with the colors of the layers, and including a screenshot of what I look at when I am using software to "create" a transistor. The wikipedia images are from the side, whereas engineers view things from the top.




The red polygon, representing the gate, interfaces with the control signal for the transistor. The green layer represents the 'n' implant into the 'p' type silicon. The blue layer is a metal routing layer on top - there are other metal layers for routing, along with via layers such as the teal layer above that connect metal layers to other layers.

You'll notice I don't specify all the layers. The silicon dioxide layer, dashed in the figure, doesn't have a corresponding polygon. Some layers are auto-generated from other layers; this can create problems when you want to do something fancy.

Starting from these simple layers, we can quickly build up complicated devices. I didn't mention this before, but there are actually two types of complementary transistors on most integrated circuits. This is the basis for the term CMOS, or complementary metal oxide semiconductor. The next picture shows both types of transistors. You can check out the CMOS Wikipedia page if you're interested in the two types.



The structure you're looking at is an inverter, as it outputs the opposite of the input signal after some time. If you're confused by the layers, follow the red polygon (the gate) to the green areas - the overlap area would be the two transistors. The yellow and white dotted layers help describe which type of transistor is to be created. The big orange box around the top portion would change the material in a large area, and is required for one of the two transistor types. The teal / cyan squares are vias that connect the metal to other material. Though vias only connect to the green layers in the transistor I showed above, they can also connect to other layers.

There are additional metal routing layers than the metal one I've shown so far. The next picture shows a custom structure I have made. This structure includes yellow and white polygons, which represent metals at different heights than the metal in the previous images.



The purple and orange squares represent vias between the various metal layers. The structure that you're looking at is a variable-delay buffer. It takes a control signal and an input signal, and outputs the input signal after a delay which is set by the control signal.

I've included measurements on the side of the structure in microns, or one-thousandth of a millimeter. A micron is also one-millionth of a meter. When you hear people talk about different integrated circuits production processes, they'll usually use the minimum accuracy of the gate size as a first-order statement of how advanced the process is. This is a 0.35 micron process, meaning that the minimum gate size is 0.35 microns, or 350 nanometers. The current processor in your computer is probably a 45, 90 or 130 nanometer process.

You might ask why people care about the construction of the circuit - don't we really just care about the behavior? Digital engineers do tend to care more about the behavior than the construction itself, and they usually don't lay out circuits by hand. They usually specify the behavior using some type of code, and run this code through a bunch of fancy tools to get the material locations.

However, if you work with sensors, it is often more difficult to specify the exact characteristics of the structures than simply laying out the structures by hand. This is the case for most of the work my group does.

There is the additional problem that messing up means the entire circuit might not work. This is why I'm constantly stressed out - while one mistake can cost a software person months of their life, simple things are enough to easily prevent this. This often isn't the case in hardware, as creating the circuit takes months, and you're stuck with the circuit.

Well, I hope you enjoyed my post on tape-outs. I cannot post pictures of my more complex structures, as a lot of the cells I work with are proprietary, and the man would come after me. I'm finished with this tape-out in early November, and then it will be a few months before I know whether it was a waste of time. I'll probably be drinking a lot of egg nog at xmas time.

Timing Properties of SPADs

I've gotten requests for more technical material, so here ya go:

Today I'm going to talk about some applications of SPADs. If you want a reminder of the basics of SPADs, you can read my introductory post or my post on noise. SPADs are single-photon detectors that use feedback systems in conjunction with one another to accurately time the arrival of single-photons. Accurately timing a photon's arrival time is important in many applications, but today I'll be talking about rangefinding.

In rangefinding applications, such as laser-based rangefinding for land surveying, a laser fires a pulse of photons and a detector times the difference between the pulse and the photon detection time. Photons, being light, travel at the speed of light. You'll usually here the speed of light quoted as 300,000,000 meters per second, but optics people prefer to quote the speed of light as

• 30 centimeters per nanosecond
• 300 millimeters per nanosecond
• 300 micrometers (microns) per picosecond
• 30 millimeters per 100 picoseconds

We use these values because modern electronics usually have around 100 picoseconds of accuracy. In the future, I think the 300 microns per picosecond value will become more common.

Anyways, we have to accurately time this photon arrival so we can determine the time of flight. The timing inaccuracy is termed jitter; we use various metrics to quantify the jitter, but most of these metrics just capture the usual case. For SPADs, the jitter depends on a few things.

First, the temperature is very important. In a silicon integrated circuit, increasing the temperature increases the ambient energy available to electrons, the main information carriers in the circuit. The introduction of additional energy modifies a carrier's behavior, and thus changing the temperature will change the characteristics of both the fast and slow feedback loops in SPADs.

Next, the color of the light is also important. Different colors of light have different wavelengths. The wavelength describes how frequently the energy moves around in space. Since silicon has a repeating structure, the wavelengths will help determine how likely it is that the light interacts with the crystal, producing the primary electron that could cause an avalanche. It turns out that blue light is optimal for the current generation of SPADs - the optimal wavelength is a balance between how far light usually penetrates into the silicon and where the avalanche region is (remember that we moved the region away from the surface to avoid the noise-causing irregularities at the surface).

Within the avalanche region, the build-up time of the avalanche is obviously important. During the initial portion of the positive feed-back loop, when there are very few carriers active, the variation in each carrier can change the build-up time. Current understanding is that it takes between 0 and 15 picoseconds to generate enough carriers to average out these variations, though this build-up process depends on characteristics like the temperature and strength of the applied force (the electric field).

So what is the end result? Well it depends on what you need and what you have available. If you have a lot of area available on a silicon chip, you can use more complex current detectors to get the jitter as low as 15 or 20 picoseconds. On the other hand, if you're short on area you can raise the jitter as much as you like, but you'd be hard-pressed to raise it above nanoseconds and still have a viable application. Keep in mind that you'll be changing how close the SPADs are, so the cross-talk will change.

When you're making a range-finder, you might care only about one specific range, or you might be trying to acquire a bunch of ranges to get a 3D pictures. If you only care about one range, you can use a lot of area to achieve the 20 picosecond resolution. This corresponds to an uncertainty in space around 6 millimeters. If you have an array of SPADs and timing circuitry, you're more likely to have an error in the 100 picosecond range. 100 picoseconds corresponds to an error of 3 cm in space. You can lower this uncertainty by taking multiple measurements, and since the measurements are so fast the accuracy can easily be one millimeter or less.

Anyways, I hope this post helped you understand about the timing uncertainty in SPADs. The uncertainty affects other applications besides rangefinding, things like quantum-based encryption algorithms, biological imaging, and cancer detection, but those applications are a bit more complicated to explain! I'll be attempting in future posts, and we'll see how it goes.

Feeling Good About Being Stupid

I wish I had some people's tolerance for their own ignorance:

Second, we don't do a good enough job of teaching our students how to be productively stupid – that is, if we don't feel stupid it means we're not really trying...Focusing on important questions puts us in the awkward position of being ignorant.

Aside from the isolating nature of graduate school, constantly feeling stupid is probably the hardest thing to adapt to. I still haven't found a good way to focus in the face of infinite possibilities.

Oh, right, I read reddit to help me focus. Nevermind.