If you've talked with me lately, I've probably told you how stressed out I am about something called a "tape-out." The phrase refers to production of an integrated circuit. According to my adviser, 20 or 30 years ago, before the internet was around, circuit designers would send physical tapes to the chip manufacturers. Hence the term tape-out. Thus when an electrical engineer is creating an integrated circuit, (s)he uses the term tape-out to describe the process.
Today I thought I'd share a little bit of the designer process, so you can understand what I'm talking about when I say I've been staring at colored polygons all day. Circuits perform a lot of tasks, from the main processing in our computers, to capturing images in some of our cameras, or detecting events in the world around us.
To create circuits to do all these things, engineers start simple and build up. The basic unit in an integrated circuit is the transistor, which acts as a switch in digital logic. The switch is on or off depending on the electrical signals we send to the transistor. I've taken public domain pictures from
Wikipedia that shows the behavior when the transistor is off (first picture) or on (second picture).
The basis for transistor construction is the placement of materials with different characteristics. The "n" and "p" labels above are on materials with different elements. Placing these materials at proper distances from one another is critical to proper operation of the switches.
When electrical engineers create circuits, we need ways to control where the materials go, and then we can control the behavior of the circuit. Thus when I talk about colored polygons, I am talking about visualizing the locations of different types of material that determine a circuit's operation. I've labeled the drawings above with the colors of the layers, and including a screenshot of what I look at when I am using software to "create" a transistor. The wikipedia images are from the side, whereas engineers view things from the top.
The red polygon, representing the gate, interfaces with the control signal for the transistor. The green layer represents the 'n' implant into the 'p' type silicon. The blue layer is a metal routing layer on top - there are other metal layers for routing, along with via layers such as the teal layer above that connect metal layers to other layers.
You'll notice I don't specify all the layers. The silicon dioxide layer, dashed in the figure, doesn't have a corresponding polygon. Some layers are auto-generated from other layers; this can create problems when you want to do something fancy.
Starting from these simple layers, we can quickly build up complicated devices. I didn't mention this before, but there are actually two types of complementary transistors on most integrated circuits. This is the basis for the term CMOS, or complementary metal oxide semiconductor. The next picture shows both types of transistors. You can check out the
CMOS Wikipedia page if you're interested in the two types.
The structure you're looking at is an inverter, as it outputs the opposite of the input signal after some time. If you're confused by the layers, follow the red polygon (the gate) to the green areas - the overlap area would be the two transistors. The yellow and white dotted layers help describe which type of transistor is to be created. The big orange box around the top portion would change the material in a large area, and is required for one of the two transistor types. The teal / cyan squares are vias that connect the metal to other material. Though vias only connect to the green layers in the transistor I showed above, they can also connect to other layers.
There are additional metal routing layers than the metal one I've shown so far. The next picture shows a custom structure I have made. This structure includes yellow and white polygons, which represent metals at different heights than the metal in the previous images.
The purple and orange squares represent vias between the various metal layers. The structure that you're looking at is a variable-delay buffer. It takes a control signal and an input signal, and outputs the input signal after a delay which is set by the control signal.
I've included measurements on the side of the structure in microns, or one-thousandth of a millimeter. A micron is also one-millionth of a meter. When you hear people talk about different integrated circuits production processes, they'll usually use the minimum accuracy of the gate size as a first-order statement of how advanced the process is. This is a 0.35 micron process, meaning that the minimum gate size is 0.35 microns, or 350 nanometers. The current processor in your computer is probably a 45, 90 or 130 nanometer process.
You might ask why people care about the construction of the circuit - don't we really just care about the behavior? Digital engineers do tend to care more about the behavior than the construction itself, and they usually don't lay out circuits by hand. They usually specify the behavior using some type of code, and run this code through a bunch of fancy tools to get the material locations.
However, if you work with sensors, it is often more difficult to specify the exact characteristics of the structures than simply laying out the structures by hand. This is the case for most of the work my group does.
There is the additional problem that messing up means the entire circuit might not work. This is why I'm constantly stressed out - while one mistake can cost a software person months of their life, simple things are enough to easily prevent this. This often isn't the case in hardware, as creating the circuit takes months, and you're stuck with the circuit.
Well, I hope you enjoyed my post on tape-outs. I cannot post pictures of my more complex structures, as a lot of the cells I work with are proprietary, and the man would come after me. I'm finished with this tape-out in early November, and then it will be a few months before I know whether it was a waste of time. I'll probably be drinking a lot of egg nog at xmas time.
A west view from my building, towards the part of town with the high-rise apartment buildings.
I've circled a bunch of the high rise buildings. As I've previously described, most of the development in Delft occurs on the outskirts of town. This preserves the town center as is.
You can see that along the canal there are a lot of industrial type buildings. A lot of heavy freight is shipped along the canals instead of roads, which means that the roads require less maintainence.
Some apartments near the university. You can see part of my building in the background.
Some apartments near the university. They stand over a pond.
Due to all of the bicycle traffic, it can be difficult to know whether a bicycle is supposed to go on a path or not. The people who designed the park in the middle of campus included environmental cues to help. First, the rocks are close enough together that a bicycle would have trouble going between them. Next, the gray sections of the path are rough; riding over the alternating path sections feels unnatural on a bicycle. The path goes down a few steps out of sight, so it is important that bicyclists don't go on this path. People don't seem to like signs here, Delft has a lot of these environmental cues around the city to help bicyclists with whether or not they belong in certain places.
The main bicycle path next to the mechanical engineering building. Exposed stairwells are very common here, I think architects like them.
My building.
The civil engineering building, which also contains administrative offices. Another building with exposed stairwells.
A set of dorm rooms are by my building.
Two Hogeschools (or vocational schools) have opened up next to TUDelft. When they were building this school, they had water in the lot that is now under construction. This building looked like one of those beach buildings on stilts. The empty lot will soon contain housing.
Another vocational school. This one is interesting because it contains a parking lot on the roof!
